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MK74CB163 1 to 16 PECL to CMOS BuffaloTM Clock Driver
Description
The MK74CB163 BuffaloTM is a monolithic CMOS high speed clock driver. It consists of a PECL input to sixteen low-skew output, noninverting clock drivers. This monolithic solution eliminates any concern for part-to-part skew matching. The MK74CB163 is packaged in the tiny 28 pin SSOP, which uses the same board space as the narrow 16 pin SOIC.
PRELIMINARY INFORMATION
Features
* Tiny 28 pin SSOP (150 mil) package * One input to sixteen output clock drivers * Outputs are skew matched to within 250ps * 3.3 V10% supply voltage * Clock speeds up to 156 MHz * 2 Output Enables allow configuration as 1 to 6, 1 to 10, or 1 to 16 buffers. * Converts PECL input to CMOS level outputs
Family of ICS Parts
The MK74CB163 BuffaloTM is designed to be used with ICS's clock synthesizer devices. The inputs of the Buffalo are matched to the outputs of ICS clock synthesizers. Consult ICS for applications support.
Block Diagram
OE0 PECLIN PECLIN Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
4
VDD
4
Q15 Q14 Q13 Q12 Q11 Q10 Q9 Q8
GND
MDS 74CB163 A
OE1
1
Revision 112399
Integrated Circuit Systems, Inc. * 525 Race Street * San Jose *CA*95126* (408)295-9800tel * www.icst.com
MK74CB163 1 to 16 PECL to CMOS BuffaloTM Clock Driver
Pin Assignment
OE0 Q0 Q1 Q2 VDD VDD Q3 Q4 GND GND Q5 Q6 Q7 PECLIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 OE1 27 Q15 26 Q14 25 Q13 24 VDD 23 VDD 22 Q12 21 Q11 20 GND 19 GND 18 Q10 17 Q9 16 Q8 15 PECLIN
PRELIMINARY INFORMATION
Suggested Layout
V 0.1F G
V 0.1F G
For simplicity, 33 series termination resistors are not shown for the outputs, but should be placed as close to the device as possible. It is most critical to have the 0.1F decoupling capacitors closest. V = connect to VDD G = connect to GND
Pin Descriptions
Number Name 1 OE0 2, 3, 4 Q0, Q1, Q2 5, 6 VDD 7, 8 Q3, Q4 9, 10 GND 11, 12, 13 Q5, Q6, Q7 14 PECLIN 15 PECLIN 16, 17, 18 Q8, Q9, Q10 19, 20 GND 21, 22 Q11, Q12 23, 24 VDD 25, 26, 27 Q13, Q14, Q15 28 OE1 Type I O P O P O I I O P O P O I Description Output Enable. Tri-states Q0 to Q5 clock outputs when this input is low. Internal pull-up. Clock outputs. Power supply. Connect to +3.3V. Clock outputs. Connect to ground. Clock outputs. Complementary PECL input. True PECL input. Clock outputs. Connect to ground. Clock outputs. Power supply. Connect to +3.3V. Clock outputs. Output Enable. Tri-states Q6 to Q15 clock outputs when this input is low. Internal pull-up.
Type: I = Input, O = output, P = power supply connection
MDS 74CB163 A
2
Revision 112399
Integrated Circuit Systems, Inc. * 525 Race Street * San Jose *CA*95126* (408)295-9800tel * www.icst.com
MK74CB163 1 to 16 PECL to CMOS BuffaloTM Clock Driver
Electrical Specifications
Parameter Conditions ABSOLUTE MAXIMUM RATINGS (Note 1) Supply Voltage, VDD Referenced to GND Inputs Referenced to GND Clock Outputs Referenced to GND Ambient Operating Temperature Soldering Temperature Max of 20 seconds Storage Temperature DC CHARACTERISTICS (VDD = 3.3 V unless noted) Operating Voltage, VDD Input High Voltage, VIH (OE0, OE1 pins) Input Low Voltage, VIL (OE0, OE1 pins) Output High Voltage, VOH IOH=-12mA Output Low Voltage, VOL IOL=12mA Operating Supply Current, IDD, at 66.6MHz No Load Short Circuit Current Each output On-Chip Pull-up Resistor OE0, OE1 Input Capacitance (OE0, OE1) Peak-to-Peak Input Voltage, VPP PECL inputs Common Mode Range, VCMR PECL inputs AC CHARACTERISTICS (VDD = 3.3 V unless noted) Input Clock Frequency Propagation Delay with load=15pF Output Clock Rise Time 0.8 to 2.0V Output Clock Fall Time 2.0 to 0.8V Output Clock Rising Edge Skew Note 2 Output Enable Time, OE high to output on Output Disable Time, OE low to tri-state Output Duty Cycle, Load = 15 pF at VDD/2 0-125 MHz Output Duty Cycle, Load = 15 pF at VDD/2 125-156 MHz Minimum Typical Maximum 7 VDD+0.5 VDD+0.5 70 260 150 3.6 0.8 VDD-0.5 0.5 TBD 70 250 7 300 VDD-1.4 0 1000 VDD-0.6 156 Units V V V C C C V V V V V mA mA k pF mV V MHz ns ns ns ps ns ns % %
PRELIMINARY INFORMATION
0.5 0.5 0 -65 3.0 2.0
-250
45 40
0 5 5 50 50
250 20 20 55 60
Notes: 1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged exposure to levels above the operating limits but below the Absolute Maximums may affect device reliability. 2. Between any two outputs, with equal loading, measured at VDD/2. The maximum skew between any 2 pins is 250 ps not 500 ps.
MDS 74CB163 A
3
Revision 112399
Integrated Circuit Systems, Inc. * 525 Race Street * San Jose *CA*95126* (408)295-9800tel * www.icst.com
MK74CB163 1 to 16 PECL to CMOS BuffaloTM Clock Driver
Maximum Speed
The maximum speed at which the chip can operate can be limited by power dissipation in the package. Graph 1 shows the operating frequency plotted against load capacitance per pin for a die temperature of 125 C. This is at VDD = 3.3 V, 70 C and with 33 series termination resistors. The termination resistors are essential because they allow a large proportion of the total power to be dissipated outside the package. Reducing or eliminating the series termination will cause an increase in die temperature. It is not recommended to operate the chip at die temperatures greater than 125 C. Also note that the load capacitance per pin must include PC board parasitics such as trace capacitance. The MK74CB163 can safely operate up to 156 MHz with all pins loaded at 15 pF.
PRELIMINARY INFORMATION
300 250
Do not operate in this area .
200 150 100 50 0 0 20 40 60 80
Load Capacitance/per pin (pF) Graph 1 Maximum Speed
MDS 74CB163 A
4
Revision 112399
Integrated Circuit Systems, Inc. * 525 Race Street * San Jose *CA*95126* (408)295-9800tel * www.icst.com
MK74CB163 1 to 16 PECL to CMOS BuffaloTM Clock Driver
Package Outline and Package Dimensions
(For current dimensional specifications, see JEDEC publication no. 95) 28 pin SSOP (QSOP)
Symbol A A1 B C D E H e L Inches Min Max 0.053 0.069 0.004 0.01 0.008 0.012 0.007 0.010 0.386 0.394 0.150 0.157 0.228 0.244 .025 BSC 0.016 0.05 Millimeters Min Max 1.35 1.75 0.10 0.25 0.20 0.30 0.19 0.25 9.80 10.01 3.81 3.99 5.79 6.20 0.635 BSC 0.41 1.27
PRELIMINARY INFORMATION
E
H
D C A e A1 B L
Ordering Information
Part/Order Number MK74CB163R MK74CB163RTR Marking MK74CB163R MK74CB163R Package 28 pin SSOP (QSOP) Add Tape & Reel Temperature 0-70C 0-70C
While the information presented herein has been checked for both accuracy and reliability, ICS Incorporated assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. Buffalo is a trademark of ICS Incorporated
MDS 74CB163 A
5
Revision 112399
Integrated Circuit Systems, Inc. * 525 Race Street * San Jose *CA*95126* (408)295-9800tel * www.icst.com

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